Artificial intelligence×Voltage

Digital AI is hitting a hard energy ceiling at the edge; the path forward runs through analog and mixed-signal hardware where neural activations are encoded as continuous voltages rather than binary words. The co-occurrence of neuromorphic engineering, band-gap materials, and wearable electronics as shared bridge fields reveals that a critical mass of researchers already inhabits the physics-meets-inference boundary — the formal collision of AI and voltage science is the next logical step. When CMOS-compatible electro-optic modulators and high-voltage electrode chemistry are read alongside ResNet-scale model demands, the pressure point is obvious: inference energy must be cut by orders of magnitude, and voltage-domain computation is the candidate mechanism.

Seventy-five authors already publish independently on both sides but have not yet co-authored — this is a pre-fusion tension state, not an absence of interest. The six shared bridge fields are structurally telling: neuromorphic engineering points directly at spike-voltage encoding of neural signals; band gap ties semiconductor physics to threshold-voltage design of inference hardware; wearable technology creates the commercial forcing function (always-on biosignal AI at microwatt budgets). The CMOS-compatible electro-optic modulator paper signals that photonic-voltage interfaces are already at foundry-ready voltage rails, removing a long-standing integration barrier. Momentum on both sides is synchronized: AI is pushing toward edge/embedded deployment while voltage-materials research (perovskites, LiNbO₃) is hitting maturity inflection points.

Groups sitting at the neuromorphic-plus-ML intersection will lead — specifically teams with mixed-signal VLSI design capability combined with training-aware hardware co-design experience. University groups with joint ECE/CS faculty (MIT, Stanford, ETH Zurich, Imec-affiliated programs) have structural advantage. On the industrial side, fabless chip designers who already sell analog inference silicon for wearables are best placed to absorb voltage-domain AI methods. Battery and photonics companies that have accumulated voltage-characterization data at scale are dark-horse contributors — their datasets are the raw material for AI-driven voltage optimization loops.

A systematic benchmark study that trains a family of lightweight convolutional and transformer models with voltage-aware quantization (mapping activations explicitly to fabricable voltage rails in a 28nm mixed-signal process) and measures energy-per-inference against ISO-accuracy digital INT4 baselines on continuous biosignal tasks (ECG, EMG, EEG) representative of wearable deployment — with the explicit goal of identifying the crossover point where analog voltage encoding beats digital at sub-1mW total budgets.