Electronic circuit×Artificial intelligence

As CMOS scaling plateaus, the exponential compute appetite of modern AI is forcing a physical reckoning: algorithms and electronic substrates must be co-designed, not merely paired. Photonic, spintronic, and neuromorphic circuit paradigms—already validated as stand-alone advances—are structurally ready to absorb AI training and inference workloads in ways that von Neumann architectures cannot match. This is not incremental chip improvement; it is a substrate-level reinvention of where intelligence lives.

The bridge fields are the tell: CMOS and Unconventional Computing sit at the seam of both communities, meaning researchers on each side already share vocabulary and fabrication intuition. The Field A anchor papers—neuromorphic spintronics, programmable photonic circuits—are explicitly AI-adjacent, not generic EE. Sixty-four authors currently straddle both literatures without co-publishing, a classic 'pre-fusion' posture where individual careers are hedging before the formal merge. The AI field's massive momentum (2322 works, 5.4% recent share) will gravitationally pull the smaller circuit community (102 works) into explicit collaboration within 18–36 months.

University groups running joint EE-CS hardware-software co-design programs (particularly those with both photonics/spintronics fabrication facilities and ML theory groups) are best placed to publish the foundational work. On the applied side, semiconductor firms that already own both the fab process and an AI accelerator division can vertically integrate this fusion fastest. Edge-inference chip designers—those constrained by power budgets—have the sharpest commercial motive to move beyond CMOS.

A cross-substrate AI benchmarking initiative: fund a consortium to run identical sparse and dense neural-network inference workloads across photonic, spintronic, electrochemical, and standard CMOS test chips under matched power envelopes, producing the first apples-to-apples energy-per-inference-operation dataset. This empirical substrate map would both guide algorithm designers toward physically achievable architectures and give circuit teams an AI-native design target—accelerating the explicit co-publication phase the structural data says is imminent.