Electronic circuit×Artificial intelligence

Artificial intelligence is outgrowing conventional digital circuits, and the frontier is moving computation into the physical substrate itself — neuromorphic spintronic devices and programmable photonic circuits that perform inference at the speed and energy of physics rather than transistors. When circuit design and deep learning fuse, the result is analog and optical hardware co-designed with the models it runs, collapsing the energy-per-inference wall that now bottlenecks scaling.

The two communities still barely co-publish, but the connective tissue is already dense: shared bridge fields (Photonics, Nonlinear system, Interfacing, Scalability) and 55 authors who already work both sides separately, plus strong topological affinity (Adamic-Adar 6.8, 28 common neighbours). The representative circuit papers are literally 'Programmable photonic circuits' and 'Neuromorphic spintronics' — hardware explicitly reaching toward AI workloads — while the AI side is dominated by compute-hungry deep learning. The gap is a coordination gap, not a conceptual one; it closes the moment energy and latency limits force AI onto new substrates.

Winners will be teams that co-design at both layers simultaneously — physicists/EE researchers fluent in device physics (spintronics, silicon photonics, memristive crossbars) who also understand modern deep-learning training and quantization. Interdisciplinary university labs and hardware-native AI groups sit better than pure-software ML shops, because the moat is fabrication + model co-design, not either alone.

Fund an end-to-end co-design testbed: train a mid-scale deep network directly against the physical nonidealities of a specific analog substrate (e.g., a silicon-photonic mesh or spintronic crossbar), using hardware-in-the-loop training that treats device noise, drift, and nonlinearity as differentiable constraints — then benchmark energy-per-inference and accuracy against a GPU baseline on a fixed vision or language task.